{"id":227,"date":"2017-09-16T21:14:07","date_gmt":"2017-09-16T13:14:07","guid":{"rendered":"https:\/\/www.tiferking.cn\/?p=227"},"modified":"2023-01-30T14:39:29","modified_gmt":"2023-01-30T06:39:29","slug":"adf4251-%e9%94%81%e7%9b%b8%e7%8e%af-%e4%bd%bf%e7%94%a8%e7%ac%94%e8%ae%b0-%e9%85%8d%e5%90%88hal%e5%ba%93","status":"publish","type":"post","link":"https:\/\/www.tiferking.cn\/index.php\/2017\/09\/16\/227\/","title":{"rendered":"ADF4251 \u9501\u76f8\u73af \u4f7f\u7528\u7b14\u8bb0 (\u914d\u5408HAL\u5e93)"},"content":{"rendered":"\n

\u4e4b\u524d\u5728\u6bd4\u8d5b\u51c6\u5907\u7684\u65f6\u5019\u6709\u51c6\u5907\u8fc7\u5173\u4e8e\u9501\u76f8\u73af\u76f8\u5173\u7684\u5668\u4ef6\uff0c\u8fd9\u91cc\u4ecb\u7ecd\u4e00\u4e0bADF4351<\/a>\u8fd9\u6b3e\u5bbd\u5e26\u9891\u7387\u5408\u6210\u5668<\/strong>\u7684\u4f7f\u7528\u3002<\/p>\n\n\n\n

\u7531\u4e8e\u6211\u4f7f\u7528\u7684\u662f\u8d2d\u4e70\u6765\u7684\u6210\u54c1\u6a21\u5757\uff0c\u6240\u4ee5\u8fd9\u91cc\u7740\u91cd\u8bb2\u7684\u662f\u8f6f\u4ef6\u9a71\u52a8\u65b9\u9762\u3002<\/p>\n\n\n\n

ADF4351 \u7528\u6237\u624b\u518c<\/a><\/p>\n\n\n\n

\u9996\u5148\u6839\u636e\u624b\u518c\u53ef\u4ee5\u770b\u5230\uff0c\u8fd9\u662f\u4e00\u6b3e35MHz\u52304.4GHz\u7684\u9501\u76f8\u73af\u82af\u7247\uff0c\u5177\u6709\u4f4e\u76f8\u4f4d\u566a\u58f0\u7b49\u4f18\u70b9\uff0c\u540c\u65f6\u652f\u6301\u5c0f\u6570\u548c\u6574\u6570\u5206\u9891\u3002\u5176\u5b9e\u5b83\u7684VCO\u662f2.2GHz\u52304.4GHz\u7684\u632f\u8361\u5668\uff0c\u5176\u4f5935MHz\u52302.2GHz\u5168\u90e8\u662f\u7531\u53ef\u7f16\u7a0b\u7684\u8f93\u51fa\u5206\u9891\u5668\u5206\u9891\u5f97\u5230\u7684\u3002\u8fd9\u6b3e\u82af\u7247\u7684\u6027\u80fd\u662f\u975e\u5e38\u597d\u7684\uff0c\u8f93\u51fa\u7684\u4fe1\u53f7\u76f8\u4f4d\u566a\u58f0\u5f88\u4f4e\uff0c\u624b\u518c\u4e0a\u7ed9\u51fa\u7684\u6570\u636e\u662f\u2212100dBc\/Hz 3 kHz from 2111.28 MHz carrier\uff0c\u5728\u5b9e\u9645\u6d4b\u8bd5\u4e2d\u53d1\u73b0\u6211\u624b\u4e2d\u7684\u8fd9\u5757\u82af\u7247\u751a\u81f3\u7565\u5fae\u8d85\u51fa\u4e86\u8fd9\u4e2a\u53c2\u6570\u3002<\/p>\n\n\n\n

\u63a5\u4e0b\u6765\u5173\u6ce8\u5230\uff0c\u5176\u914d\u7f6e\u65b9\u5f0f\u662f\u901a\u8fc7\u4e00\u4e2a3-wire\u7684\u4e32\u884c\u603b\u7ebf\u5b8c\u6210\u7684\uff0c\u90a3\u4e48\u53ef\u4ee5\u5173\u6ce8\u4e00\u4e0b\u8fd9\u4e2a\u603b\u7ebf\u7684\u901a\u4fe1\u65f6\u5e8f\uff1a\"\"<\/a><\/p>\n\n\n\n

\u4ece\u65f6\u5e8f\u53ef\u4ee5\u770b\u51fa\uff0c\u8fd9\u4e2a\u4e09\u7ebf\u4e32\u53e3\u4e2d\uff0c\u6709\u4e00\u6761\u4f7f\u80fd\u7ebf\uff0c\u4e00\u6761\u65f6\u949f\u7ebf\u548c\u4e00\u6761\u6570\u636e\u7ebf\uff0c\u8fd9\u4e2a\u4e09\u7ebf\u4e32\u53e3\u5176\u5b9e\u5c31\u662fSPI\u63a5\u53e3\uff0c\u6240\u4ee5\u6211\u4eec\u53ef\u4ee5\u76f4\u63a5\u8c03\u7528\u5355\u7247\u673a\u7684\u786c\u4ef6SPI\u6a21\u5757\u6765\u4e0e\u5176\u901a\u4fe1\u3002\u5e76\u4e14\u9700\u8981\u6ce8\u610f\u7684\u662f\uff0c\u5728\u8fd9\u4e2a\u534f\u8bae\u5f53\u4e2d\uff0c\u540e\u4e09\u4f4d\u8868\u793a\u7684\u662f\u5bc4\u5b58\u5668\u7684\u7f16\u53f7\uff0c\u800c\u4e14\u8fd9\u4e2a\u534f\u8bae\u7684\u901f\u7387\u4e0d\u5e94\u8be5\u9ad8\u4e8e20Mbps\u3002<\/p>\n\n\n\n

\u5173\u4e8e\u5982\u4f55\u914d\u7f6e\u8fd9\u5757\u82af\u7247\uff0c\u5c31\u9700\u8981\u5927\u81f4\u7684\u4e86\u89e3\u4e00\u4e0b\u5b83\u7684\u5de5\u4f5c\u539f\u7406\u3002\u9996\u5148\u5411\u5176\u8f93\u5165\u4e00\u4e2aREF-in\u7684\u53c2\u8003\u8f93\u5165\u4fe1\u53f7\uff0c\u7136\u540e\u8fd9\u4e2a\u53c2\u8003\u4fe1\u53f7\u5728\u901a\u8fc7\u4e00\u4e2a\u7f13\u51b2\u5668\u4e4b\u540e\uff0c\u4f1a\u8fdb\u5165\u4e00\u4e2a\u540d\u4e3aR counter\u7684\u8ba1\u6570\u5668\u4e2d\uff0c\u8fd9\u91cc\u5462\u5c31\u4f7f\u7528\u4e86\u8ba1\u6570\u5668\u5bf9\u8f93\u5165\u7684\u53c2\u8003\u4fe1\u53f7\u8fdb\u884c\u5206\u9891\uff0c\u8fd9\u4e00\u6b65\u7684\u5206\u9891\u53ef\u4ee5\u4f7f\u5f97\u5206\u9891\u540e\u7684\u4fe1\u53f7\u62e5\u6709\u66f4\u5c0f\u7684\u76f8\u4f4d\u566a\u58f0\u3002\u540c\u65f6\uff0c\u7531\u538b\u63a7\u632f\u8361\u5668VCO\u4ea7\u751f\u7684\u4fe1\u53f7\u7ecf\u8fc7N counter\u8ba1\u6570\u5668\u540e\uff0c\u4e00\u5e76\u901a\u5165\u9274\u9891\u9274\u76f8\u5668\u4e2d\u3002\u6700\u540e\u5c06\u9274\u9891\u9274\u76f8\u5668\u7684\u8f93\u5165\u901a\u5165\u7535\u8377\u6cf5\uff0c\u901a\u8fc7\u7535\u8377\u6cf5\u540e\u7684\u7535\u538b\u518d\u7528\u6765\u63a7\u5236VCO\u3002\u6240\u4ee5\u8f93\u51fa\u9891\u7387\u7684\u8ba1\u7b97\u516c\u5f0f\u5373\u4e3a\uff1a<\/p>\n\n\n\n

\"\"<\/a><\/figure>\n\n\n\n
\"\"<\/a><\/figure>\n\n\n\n

\u4f46\u662f\u9700\u8981\u6ce8\u610f\u7684\u662f\uff0cRF_OUT\u7684\u503c\u5fc5\u987b\u662f\u4e00\u4e2a2.2G\u52304.4G\u4e4b\u95f4\u7684\u503c<\/strong>\uff0c\u56e0\u4e3a\u5b83\u662f\u538b\u63a7\u632f\u8361\u5668VCO\u7684\u8f93\u51fa\u503c\u3002\u800c\u6700\u7ec8\u82af\u7247\u7684\u8f93\u51fa\u9891\u738735MHz-4.4GHz\u9700\u8981\u5c06RF_OUT\u7684\u8f93\u51fa\u503c\u518d\u8fdb\u884c\u4e00\u4e2a2\u7684\u6b21\u65b9\u500d\u5206\u9891\u624d\u884c\u3002<\/p>\n\n\n\n

\u5173\u4e8e\u5bc4\u5b58\u5668\u7684\u529f\u80fd\uff0c\u4fbf\u4e0d\u518d\u8be6\u8ff0\uff0c\u624b\u518c\u4e0a\u5199\u7684\u975e\u5e38\u8be6\u5c3d\u3002<\/p>\n\n\n\n

\u6700\u540e\u9644\u4e0a\u4ee3\u7801(\u53cc\u51fb\u4ee3\u7801\u533a\u57df\u590d\u5236)\uff1a<\/p>\n\n\n\n

\/**\n  ******************************************************************************\n  * File Name          : main.c\n  * Description        : Main program body\n  ******************************************************************************\n  *\n  * COPYRIGHT(c) 2017 STMicroelectronics\n  *\n  * Redistribution and use in source and binary forms, with or without modification,\n  * are permitted provided that the following conditions are met:\n  *   1. Redistributions of source code must retain the above copyright notice,\n  *      this list of conditions and the following disclaimer.\n  *   2. Redistributions in binary form must reproduce the above copyright notice,\n  *      this list of conditions and the following disclaimer in the documentation\n  *      and\/or other materials provided with the distribution.\n  *   3. Neither the name of STMicroelectronics nor the names of its contributors\n  *      may be used to endorse or promote products derived from this software\n  *      without specific prior written permission.\n  *\n  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\n  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\n  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\n  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\n  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\n  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n  *\n  ******************************************************************************\n  *\/\n\/* Includes ------------------------------------------------------------------*\/\n#include \"main.h\"\n#include \"stm32f1xx_hal.h\"\n\n\/* USER CODE BEGIN Includes *\/\n\n\/* USER CODE END Includes *\/\n\n\/* Private variables ---------------------------------------------------------*\/\nCRC_HandleTypeDef hcrc;\n\nIWDG_HandleTypeDef hiwdg;\n\nSPI_HandleTypeDef hspi2;\n\nTIM_HandleTypeDef htim6;\nTIM_HandleTypeDef htim7;\n\nWWDG_HandleTypeDef hwwdg;\n\n\/* USER CODE BEGIN PV *\/\n\/* Private variables ---------------------------------------------------------*\/\n#define PLL_PROT hspi2\ntypedef struct PLL_Configure{\n    enum{\n        PLL_DISABLE = 0,\n        PLL_ENABLE\n    };\n    unsigned short integer_value;\t\t\t\t\t\t\/\/16-bit Greater than 23, to 65535\n    unsigned short fractional_value;\t\t\t\t\/\/12-bit 0 to 4095\n    unsigned char phase_adjust;\t\t\t\t\t\t\t\/\/1-bit 0-OFF 1-ON\n    enum{\n        PHASE_ADJ_OFF = 0,\n        PHASE_ADJ_ON\n    }phase_adjust_type;\n    \/\/unsigned char prescaler;\t\t\t\t\t\t\t\t\/\/1-bit 0-(4\/5) 1-(8\/9)\n    enum prescaler_type{\n        PRESCALER_4Div5 = 0,\n        PRESCALER_8Div9\n    }prescaler;\n    \/\/enum prescaler_type prescaler;\n    unsigned short phase_value;\t\t\t\t\t\t\t\/\/12-bit 0 to 4095, 1 is recommended\n    unsigned short modulus_value;\t\t\t\t\t\t\/\/12-bit Greater than 2, to 4095\n    unsigned char low_noise_and_low_spur;\t\t\/\/2-bit 00b-(Low Noise Mode) 11b-(Low Spur Mode)\n    enum{\n        LOW_NOISE = 0,\n        LOW_SUPR = 3\n    }low_nose_and_low_spur_type;\n    unsigned char muxout;\t\t\t\t\t\t\t\t\t\t\/\/3-bit\n    enum{\n        MUXOUT_Three_State_Output = 0,\n        MUXOUT_DVdd,\n        MUXOUT_DGND,\n        MUXOUT_R_COUNTER,\n        MUXOUT_N_DIVIDER,\n        MUXOUT_ANALOG_LOCK_DETECT,\n        MUXOUT_DIGITAL_LOCK_DETECT,\n        MUXOUT_RESERVED\n    }muxout_type;\n    \/\/000b-Three-State Output\n    \/\/001b-DVdd\n    \/\/010b-DGND\n    \/\/011b-R Counter Output\n    \/\/100b-N Divider Output\n    \/\/101b-Analog Lock Detect\n    \/\/110b-Digital Lock Detect\n    \/\/111b-Reserved\n    unsigned char reference_doubler;\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char reference_divide_by2;\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned short r_counter;\t\t\t\t\t\t\t\t\/\/10-bit Greater than 1, to 1023\n    unsigned char double_buffer;\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char charge_pump_current;\t\t\t\/\/4-bit 0 to 15\n    \/*CHARGE PUMP CURRENT SETTING VALUE\n    0000 0.31\n    0001 0.63\n    0010 0.94\n    0011 1.25\n    0100 1.56\n    0101 1.88\n    0110 2.19\n    0111 2.50\n    1000 2.81\n    1001 3.13\n    1010 3.44\n    1011 3.75\n    1100 4.06\n    1101 4.38\n    1110 4.69\n    1111 5.00*\/\n    unsigned char LDF;\t\t\t\t\t\t\t\t\t\t\t\/\/1-bit 0-FRAC-N 1-INT-N\n    enum{\n        FRAC_N = 0,\n        INT_N\n    }LDF_type;\n    unsigned char LDP;\t\t\t\t\t\t\t\t\t\t\t\/\/1-bit 0-10ns 1-6ns\n    enum{\n        LDP_10ns = 0,\n        LDP_6ns\n    }LDP_type;\n    unsigned char PD_polarity;\t\t\t\t\t\t\t\/\/1-bit 0-NEGTIVE 1-POSITIVE\n    enum{\n        NEGTIVE = 0,\n        POSITIVE\n    }PD_polarity_type;\n    unsigned char power_down;\t\t\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char CP_three_state;\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char counter_reset;\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char band_select_clock;\t\t\t\t\/\/1-bit 0-LOW 1-HIGH\n    enum{\n        LOW = 0,\n        HIGH\n    }band_select_clock_type;\n    unsigned char antibacklash_pulse_width;\t\/\/1-bit 0-6ns 1-3ns\n    enum{\n        ANTIBACKLASH_PULSE_6ns = 0,\n        ANTIBACKLASH_PULSE_3ns\n    }antibacklash_pulse_type;\n    unsigned char charge_cancelation;\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char cycle_slip_reduction;\t\t\t\/\/1-bit 0-Disable\t1-Enable\n    unsigned char clk_div_mode;\t\t\t\t\t\t\t\/\/2-bit\n    enum{\n        CLOCK_DIVIDER_OFF = 0,\n        FAST_LOCK_ENABLE,\n        RESYNC_ENABLE\n    }clk_div_mode_type;\n    unsigned short clock_divider_value;\t\t\t\/\/12-bit 0 to 4095\n    unsigned char feedback_select;\t\t\t\t\t\/\/1-bit 0-Divided 1-Fundamental\n    enum{\n        DIVIDED = 0,\n        FUNDAMENTAL\n    }feedback_select_type;\n    unsigned char RF_divider_select;\t\t\t\t\/\/3-bit\n    \/*RF DIVIDER SELECT\n    000 \/1\n    001 \/2\n    010 \/4\n    011 \/8\n    100 \/16\n    101 \/32\n    110 \/64\n    *\/\n    unsigned char band_select_clock_divider;\/\/8-bit Greater than 1, to 255\n    unsigned char VCO_power_down;\t\t\t\t\t\t\/\/1-bit 0-Power Up 1-Power Down\n    enum{\n        VCO_POWER_UP = 0,\n        VCO_POWER_DOWN\n    }VCO_power_down_type;\n    unsigned char mute_till_lock_detect;\t\t\/\/1-bit 0-Mute Disable 1-Mute Enable\n    enum{\n        MUTE_DISABLE = 0,\n        MUTE_ENABLE\n    }mute_till_lock_detect_type;\n    unsigned char AUX_output_select;\t\t\t\t\/\/1-bit 0-Divided Output 1-Fundamental\n    enum{\n        DIVIDED_OUTPUTE = 0\n        \/\/FUNDAMENTAL\n    }AUX_output_select_type;\n    unsigned char AUX_output;\t\t\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char AUX_output_power;\t\t\t\t\t\/\/2-bit 0 to 3\n    \/*AUX OUTPUT POWER\n    00 -4dBm\n    01 -1dBm\n    10 +2dBm\n    11 +5dBm\n    *\/\n    unsigned char RF_OUT;\t\t\t\t\t\t\t\t\t\t\/\/1-bit 0-Disable 1-Enable\n    unsigned char output_power;\t\t\t\t\t\t\t\/\/2-bit\n    \/*OUTPUT POWER\n    00 -4dBm\n    01 -1dBm\n    10 +2dBm\n    11 +5dBm\n    *\/\n    unsigned char LD_pin_mode;\t\t\t\t\t\t\t\/\/2-bit\n    enum{\n        LD_LOW = 0,\n        DIGITAL_LOCK_DETECT,\n        \/\/LOW,\n        LD_HIGH = 3\n    }LD_pin_mode_type;\n}PLL_CFG;\n\/* USER CODE END PV *\/\n\n\/* Private function prototypes -----------------------------------------------*\/\nvoid SystemClock_Config(void);\nvoid Error_Handler(void);\nstatic void MX_GPIO_Init(void);\nstatic void MX_CRC_Init(void);\nstatic void MX_IWDG_Init(void);\nstatic void MX_TIM6_Init(void);\nstatic void MX_TIM7_Init(void);\nstatic void MX_WWDG_Init(void);\nstatic void MX_SPI2_Init(void);\nstatic void MX_NVIC_Init(void);\n\n\/* USER CODE BEGIN PFP *\/\n\/* Private function prototypes -----------------------------------------------*\/\nvoid PLL_Config(PLL_CFG *config);\nvoid PLL_Init(void);\nvoid PLL_Enable(void);\nvoid PLL_Disable(void);\nvoid PLL_RF_Enable(void);\nvoid PLL_RF_Disable(void);\n\/* USER CODE END PFP *\/\n\n\/* USER CODE BEGIN 0 *\/\n\n\/* USER CODE END 0 *\/\n\nint main(void)\n{\n\n  \/* USER CODE BEGIN 1 *\/\n    char a = 0;\n  \/* USER CODE END 1 *\/\n\n  \/* MCU Configuration----------------------------------------------------------*\/\n\n  \/* Reset of all peripherals, Initializes the Flash interface and the Systick. *\/\n  HAL_Init();\n\n  \/* Configure the system clock *\/\n  SystemClock_Config();\n\n  \/* Initialize all configured peripherals *\/\n  MX_GPIO_Init();\n  MX_CRC_Init();\n  MX_IWDG_Init();\n  MX_TIM6_Init();\n  MX_TIM7_Init();\n  MX_WWDG_Init();\n  MX_SPI2_Init();\n\n  \/* Initialize interrupts *\/\n  MX_NVIC_Init();\n\n  \/* USER CODE BEGIN 2 *\/\n    HAL_Delay(500);\n    PLL_Init();\n  \/* USER CODE END 2 *\/\n\n  \/* Infinite loop *\/\n  \/* USER CODE BEGIN WHILE *\/\n  while (1)\n  {\n  \/* USER CODE END WHILE *\/\n\n  \/* USER CODE BEGIN 3 *\/\n  }\n  \/* USER CODE END 3 *\/\n\n}\n\n\/** System Clock Configuration\n*\/\nvoid SystemClock_Config(void)\n{\n\n  RCC_OscInitTypeDef RCC_OscInitStruct;\n  RCC_ClkInitTypeDef RCC_ClkInitStruct;\n\n    \/**Initializes the CPU, AHB and APB busses clocks \n    *\/\n  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;\n  RCC_OscInitStruct.HSEState = RCC_HSE_ON;\n  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;\n  RCC_OscInitStruct.HSIState = RCC_HSI_ON;\n  RCC_OscInitStruct.LSIState = RCC_LSI_ON;\n  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;\n  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;\n  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;\n  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n    \/**Initializes the CPU, AHB and APB busses clocks \n    *\/\n  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK\n                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;\n  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;\n  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;\n  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;\n  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;\n\n  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n    \/**Configure the Systick interrupt time \n    *\/\n  HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()\/1000);\n\n    \/**Configure the Systick \n    *\/\n  HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);\n\n  \/* SysTick_IRQn interrupt configuration *\/\n  HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);\n}\n\n\/** NVIC Configuration\n*\/\nstatic void MX_NVIC_Init(void)\n{\n  \/* EXTI9_5_IRQn interrupt configuration *\/\n  HAL_NVIC_SetPriority(EXTI9_5_IRQn, 0, 0);\n  HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);\n  \/* EXTI15_10_IRQn interrupt configuration *\/\n  HAL_NVIC_SetPriority(EXTI15_10_IRQn, 0, 0);\n  HAL_NVIC_EnableIRQ(EXTI15_10_IRQn);\n  \/* SPI2_IRQn interrupt configuration *\/\n  HAL_NVIC_SetPriority(SPI2_IRQn, 0, 0);\n  HAL_NVIC_EnableIRQ(SPI2_IRQn);\n}\n\n\/* CRC init function *\/\nstatic void MX_CRC_Init(void)\n{\n\n  hcrc.Instance = CRC;\n  if (HAL_CRC_Init(&hcrc) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/* IWDG init function *\/\nstatic void MX_IWDG_Init(void)\n{\n\n  hiwdg.Instance = IWDG;\n  hiwdg.Init.Prescaler = IWDG_PRESCALER_4;\n  hiwdg.Init.Reload = 4095;\n  if (HAL_IWDG_Init(&hiwdg) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/* SPI2 init function *\/\nstatic void MX_SPI2_Init(void)\n{\n\n  hspi2.Instance = SPI2;\n  hspi2.Init.Mode = SPI_MODE_MASTER;\n  hspi2.Init.Direction = SPI_DIRECTION_2LINES;\n  hspi2.Init.DataSize = SPI_DATASIZE_16BIT;\n  hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;\n  hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;\n  hspi2.Init.NSS = SPI_NSS_SOFT;\n  hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;\n  hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;\n  hspi2.Init.TIMode = SPI_TIMODE_DISABLE;\n  hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;\n  hspi2.Init.CRCPolynomial = 10;\n  if (HAL_SPI_Init(&hspi2) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/* TIM6 init function *\/\nstatic void MX_TIM6_Init(void)\n{\n\n  TIM_MasterConfigTypeDef sMasterConfig;\n\n  htim6.Instance = TIM6;\n  htim6.Init.Prescaler = 0;\n  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;\n  htim6.Init.Period = 0;\n  if (HAL_TIM_Base_Init(&htim6) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;\n  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;\n  if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/* TIM7 init function *\/\nstatic void MX_TIM7_Init(void)\n{\n\n  TIM_MasterConfigTypeDef sMasterConfig;\n\n  htim7.Instance = TIM7;\n  htim7.Init.Prescaler = 0;\n  htim7.Init.CounterMode = TIM_COUNTERMODE_UP;\n  htim7.Init.Period = 0;\n  if (HAL_TIM_Base_Init(&htim7) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n  sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;\n  sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;\n  if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/* WWDG init function *\/\nstatic void MX_WWDG_Init(void)\n{\n\n  hwwdg.Instance = WWDG;\n  hwwdg.Init.Prescaler = WWDG_PRESCALER_1;\n  hwwdg.Init.Window = 64;\n  hwwdg.Init.Counter = 64;\n  if (HAL_WWDG_Init(&hwwdg) != HAL_OK)\n  {\n    Error_Handler();\n  }\n\n}\n\n\/** Configure pins as \n        * Analog \n        * Input \n        * Output\n        * EVENT_OUT\n        * EXTI\n*\/\nstatic void MX_GPIO_Init(void)\n{\n\n  GPIO_InitTypeDef GPIO_InitStruct;\n\n  \/* GPIO Ports Clock Enable *\/\n  __HAL_RCC_GPIOC_CLK_ENABLE();\n  __HAL_RCC_GPIOD_CLK_ENABLE();\n  __HAL_RCC_GPIOA_CLK_ENABLE();\n  __HAL_RCC_GPIOB_CLK_ENABLE();\n\n  \/*Configure GPIO pin Output Level *\/\n  HAL_GPIO_WritePin(GPIOA, PLL_EN_Pin|RF_OUT_EN_Pin, GPIO_PIN_RESET);\n\n  \/*Configure GPIO pin Output Level *\/\n  HAL_GPIO_WritePin(Load_Enable_GPIO_Port, Load_Enable_Pin, GPIO_PIN_SET);\n\n  \/*Configure GPIO pin Output Level *\/\n  HAL_GPIO_WritePin(LED0_GPIO_Port, LED0_Pin, GPIO_PIN_SET);\n\n  \/*Configure GPIO pin Output Level *\/\n  HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);\n\n  \/*Configure GPIO pins : PLL_EN_Pin RF_OUT_EN_Pin LED0_Pin *\/\n  GPIO_InitStruct.Pin = PLL_EN_Pin|RF_OUT_EN_Pin|LED0_Pin;\n  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;\n  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;\n  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);\n\n  \/*Configure GPIO pin : Load_Enable_Pin *\/\n  GPIO_InitStruct.Pin = Load_Enable_Pin;\n  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;\n  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;\n  HAL_GPIO_Init(Load_Enable_GPIO_Port, &GPIO_InitStruct);\n\n  \/*Configure GPIO pin : Digit_Lock_Detect_Pin *\/\n  GPIO_InitStruct.Pin = Digit_Lock_Detect_Pin;\n  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;\n  GPIO_InitStruct.Pull = GPIO_NOPULL;\n  HAL_GPIO_Init(Digit_Lock_Detect_GPIO_Port, &GPIO_InitStruct);\n\n  \/*Configure GPIO pin : Analog_Lock_Detect_Pin *\/\n  GPIO_InitStruct.Pin = Analog_Lock_Detect_Pin;\n  GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;\n  GPIO_InitStruct.Pull = GPIO_NOPULL;\n  HAL_GPIO_Init(Analog_Lock_Detect_GPIO_Port, &GPIO_InitStruct);\n\n  \/*Configure GPIO pin : LED1_Pin *\/\n  GPIO_InitStruct.Pin = LED1_Pin;\n  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;\n  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;\n  HAL_GPIO_Init(LED1_GPIO_Port, &GPIO_InitStruct);\n\n}\n\n\/* USER CODE BEGIN 4 *\/\nvoid PLL_Enable(void)\n{\n    HAL_GPIO_WritePin(PLL_EN_GPIO_Port,PLL_EN_Pin,GPIO_PIN_SET);\n}\n\nvoid PLL_Disable(void)\n{\n    HAL_GPIO_WritePin(PLL_EN_GPIO_Port,PLL_EN_Pin,GPIO_PIN_RESET);\n}\n\nvoid PLL_RF_Enable(void)\n{\n    HAL_GPIO_WritePin(RF_OUT_EN_GPIO_Port,RF_OUT_EN_Pin,GPIO_PIN_SET);\n}\n\nvoid PLL_RF_Disable(void)\n{\n    HAL_GPIO_WritePin(RF_OUT_EN_GPIO_Port,RF_OUT_EN_Pin,GPIO_PIN_RESET);\n}\n\nvoid PLL_Config(PLL_CFG *config)\n{\n    uint32_t Reg[6];\n    uint8_t i;\n    Reg[0] &= 0x00000000;\n    Reg[0] |= ((uint32_t)config->integer_value \t\t\t\t\t\t< < 15)\t& 0x7FFF8000;\n    Reg[0] |= ((uint32_t)config->fractional_value \t\t\t\t< < 3)\t\t& 0x00007FF8;\n    Reg[0] |= 0x00000000;\n    Reg[1] &= 0x00000000;\n    Reg[1] |= ((uint32_t)config->phase_adjust \t\t\t\t\t\t< < 28)\t& 0x10000000;\n    Reg[1] |= ((uint32_t)config->prescaler \t\t\t\t\t\t\t\t< < 27)\t& 0x08000000;\n    Reg[1] |= ((uint32_t)config->phase_value \t\t\t\t\t\t\t< < 15)\t& 0x07FF8000;\n    Reg[1] |= ((uint32_t)config->modulus_value \t\t\t\t\t\t< < 3)\t\t& 0x00007FF8;\n    Reg[1] |= 0x00000001;\n    Reg[2] &= 0x00000000;\n    Reg[2] |= ((uint32_t)config->low_noise_and_low_spur \t< < 29)\t& 0x60000000;\n    Reg[2] |= ((uint32_t)config->muxout \t\t\t\t\t\t\t\t\t< < 26)\t& 0x1C000000;\n    Reg[2] |= ((uint32_t)config->reference_doubler \t\t\t\t< < 25)\t& 0x02000000;\n    Reg[2] |= ((uint32_t)config->reference_divide_by2 \t\t< < 24)\t& 0x01000000;\n    Reg[2] |= ((uint32_t)config->r_counter \t\t\t\t\t\t\t\t< < 14)\t& 0x00FFC000;\n    Reg[2] |= ((uint32_t)config->double_buffer \t\t\t\t\t\t< < 13)\t& 0x00002000;\n    Reg[2] |= ((uint32_t)config->charge_pump_current \t\t\t< < 9)\t\t& 0x00001E00;\n    Reg[2] |= ((uint32_t)config->LDF \t\t\t\t\t\t\t\t\t\t\t< < 8)\t\t& 0x00000100;\n    Reg[2] |= ((uint32_t)config->LDP \t\t\t\t\t\t\t\t\t\t\t< < 7)\t\t& 0x00000080;\n    Reg[2] |= ((uint32_t)config->PD_polarity \t\t\t\t\t\t\t< < 6)\t\t& 0x00000040;\n    Reg[2] |= ((uint32_t)config->power_down \t\t\t\t\t\t\t< < 5)\t\t& 0x00000020;\n    Reg[2] |= ((uint32_t)config->CP_three_state \t\t\t\t\t< < 4)\t\t& 0x00000010;\n    Reg[2] |= ((uint32_t)config->counter_reset \t\t\t\t\t\t< < 3)\t\t& 0x00000008;\n    Reg[2] |= 0x00000002;\n    Reg[3] &= 0x00000000;\n    Reg[3] |= ((uint32_t)config->band_select_clock \t\t\t\t< < 23)\t& 0x00800000;\n    Reg[3] |= ((uint32_t)config->antibacklash_pulse_width < < 22)\t& 0x00400000;\n    Reg[3] |= ((uint32_t)config->charge_cancelation\t\t\t\t< < 21)\t& 0x00200000;\n    Reg[3] |= ((uint32_t)config->cycle_slip_reduction\t\t\t< < 18)\t& 0x00040000;\n    Reg[3] |= ((uint32_t)config->clk_div_mode\t\t\t\t\t\t\t< < 15)\t& 0x00018000;\n    Reg[3] |= ((uint32_t)config->clock_divider_value\t\t\t< < 3)\t\t& 0x00007FF8;\n    Reg[3] |= 0x00000003;\n    Reg[4] &= 0x00000000;\n    Reg[4] |= ((uint32_t)config->feedback_select\t\t\t\t\t< < 23)\t& 0x00800000;\n    Reg[4] |= ((uint32_t)config->RF_divider_select\t\t\t\t< < 20)\t& 0x00700000;\n    Reg[4] |= ((uint32_t)config->band_select_clock_divider< < 12)\t& 0x000FF000;\n    Reg[4] |= ((uint32_t)config->VCO_power_down\t\t\t\t\t\t< < 11)\t& 0x00000800;\n    Reg[4] |= ((uint32_t)config->mute_till_lock_detect\t\t< < 10)\t& 0x00000400;\n    Reg[4] |= ((uint32_t)config->AUX_output_select\t\t\t\t< < 9)\t\t& 0x00000200;\n    Reg[4] |= ((uint32_t)config->AUX_output\t\t\t\t\t\t\t\t< < 8)\t\t& 0x00000100;\n    Reg[4] |= ((uint32_t)config->AUX_output_power\t\t\t\t\t< < 6)\t\t& 0x000000C0;\n    Reg[4] |= ((uint32_t)config->RF_OUT\t\t\t\t\t\t\t\t\t\t< < 5)\t\t& 0x00000020;\n    Reg[4] |= ((uint32_t)config->output_power\t\t\t\t\t\t\t< < 3)\t\t& 0x00000018;\n    Reg[4] |= 0x00000004;\n    Reg[5] &= 0x00000000;\n    Reg[5] |= ((uint32_t)config->LD_pin_mode\t\t\t\t\t\t\t< < 22)\t& 0x00C00000;\n    Reg[5] |= 0x00180000;\n    Reg[5] |= 0x00000005;\n    for(i=0;i<6;i++)\n    {\n        Reg[i] = ((Reg[i] >> 16) & 0x0000FFFF) | ((Reg[i] < < 16) & 0xFFFF0000); \n    }\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[5],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[4],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[3],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[2],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[1],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_RESET);\n    HAL_SPI_Transmit(&PLL_PROT,(uint8_t*)&Reg[0],2,1000);\n    HAL_GPIO_WritePin(Load_Enable_GPIO_Port,Load_Enable_Pin,GPIO_PIN_SET);\n}\n\nvoid PLL_Init(void)\n{\n    PLL_CFG PLL_InitStruct;\n    PLL_InitStruct.integer_value = 22000;\n    PLL_InitStruct.fractional_value = 0;\n    \/\/\n    PLL_InitStruct.phase_adjust = PHASE_ADJ_OFF;\n    PLL_InitStruct.prescaler = PRESCALER_8Div9;\n    PLL_InitStruct.phase_value = 0;\n    PLL_InitStruct.modulus_value = 2;\n    \/\/\n    PLL_InitStruct.low_noise_and_low_spur = LOW_NOISE;\n    PLL_InitStruct.muxout = MUXOUT_ANALOG_LOCK_DETECT;\n    PLL_InitStruct.reference_doubler = ENABLE;\n    PLL_InitStruct.reference_divide_by2 = ENABLE;\n    PLL_InitStruct.r_counter = 250;\n    PLL_InitStruct.double_buffer = DISABLE;\n    PLL_InitStruct.charge_pump_current = 7;\n    PLL_InitStruct.LDF = INT_N;\n    PLL_InitStruct.LDP = LDP_10ns;\n    PLL_InitStruct.PD_polarity = POSITIVE;\n    PLL_InitStruct.power_down = DISABLE;\n    PLL_InitStruct.CP_three_state = DISABLE;\n    PLL_InitStruct.counter_reset = DISABLE;\n    \/\/\n    PLL_InitStruct.band_select_clock = LOW;\n    PLL_InitStruct.antibacklash_pulse_width = INT_N;\n    PLL_InitStruct.cycle_slip_reduction = DISABLE;\n    PLL_InitStruct.clk_div_mode = FAST_LOCK_ENABLE;\n    PLL_InitStruct.clock_divider_value = 4;\n    \/\/\n    PLL_InitStruct.feedback_select = FUNDAMENTAL;\n    PLL_InitStruct.RF_divider_select = 6;\n    PLL_InitStruct.band_select_clock_divider = 80;\n    PLL_InitStruct.VCO_power_down = VCO_POWER_UP;\n    PLL_InitStruct.mute_till_lock_detect = MUTE_ENABLE;\n    PLL_InitStruct.AUX_output_select = DIVIDED_OUTPUTE;\n    PLL_InitStruct.AUX_output = DISABLE;\n    PLL_InitStruct.AUX_output_power = 0;\n    PLL_InitStruct.RF_OUT = ENABLE;\n    PLL_InitStruct.output_power = 5;\n    \/\/\n    PLL_InitStruct.LD_pin_mode = DIGITAL_LOCK_DETECT;\n    \/\/\n    PLL_Enable();\n    PLL_Config(&PLL_InitStruct);\n}\n\nvoid HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)\n{\n    GPIO_PinState tmp;\n    switch(GPIO_Pin)\n    {\n        case Digit_Lock_Detect_Pin:\n            tmp = HAL_GPIO_ReadPin(Digit_Lock_Detect_GPIO_Port,Digit_Lock_Detect_Pin);\n            HAL_GPIO_WritePin(LED0_GPIO_Port,LED0_Pin,!tmp);\n            if(tmp == GPIO_PIN_SET)\n            {\n                PLL_RF_Enable();\n            }\n            break;\n        case Analog_Lock_Detect_Pin:\n            tmp = HAL_GPIO_ReadPin(Analog_Lock_Detect_GPIO_Port,Analog_Lock_Detect_Pin);\n            HAL_GPIO_WritePin(LED1_GPIO_Port,LED1_Pin,!tmp);\n            break;\n    }\n}\n\/* USER CODE END 4 *\/\n\n\/**\n  * @brief  This function is executed in case of error occurrence.\n  * @param  None\n  * @retval None\n  *\/\nvoid Error_Handler(void)\n{\n  \/* USER CODE BEGIN Error_Handler *\/\n  \/* User can add his own implementation to report the HAL error return state *\/\n  while(1) \n  {\n  }\n  \/* USER CODE END Error_Handler *\/ \n}\n\n#ifdef USE_FULL_ASSERT\n\n\/**\n   * @brief Reports the name of the source file and the source line number\n   * where the assert_param error has occurred.\n   * @param file: pointer to the source file name\n   * @param line: assert_param error line source number\n   * @retval None\n   *\/\nvoid assert_failed(uint8_t* file, uint32_t line)\n{\n  \/* USER CODE BEGIN 6 *\/\n  \/* User can add his own implementation to report the file name and line number,\n    ex: printf(\"Wrong parameters value: file %s on line %d\\r\\n\", file, line) *\/\n  \/* USER CODE END 6 *\/\n\n}\n\n#endif\n\n\/**\n  * @}\n  *\/ \n\n\/**\n  * @}\n*\/ \n\n\/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****\/\n\ufeff<\/pre>\n\n\n\n
(\u5b8c)<\/p>\n","protected":false},"excerpt":{"rendered":"
\u4e4b\u524d\u5728\u6bd4\u8d5b\u51c6\u5907\u7684\u65f6\u5019\u6709\u51c6\u5907\u8fc7\u5173\u4e8e\u9501\u76f8\u73af\u76f8\u5173\u7684\u5668\u4ef6\uff0c\u8fd9\u91cc\u4ecb\u7ecd\u4e00\u4e0bADF4351\u8fd9\u6b3e\u5bbd\u5e26\u9891\u7387\u5408\u6210\u5668\u7684\u4f7f\u7528\u3002 \u7531\u4e8e\u6211 […]<\/p>\n","protected":false},"author":1,"featured_media":229,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[8],"tags":[],"class_list":["post-227","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-story-of-mcu"],"_links":{"self":[{"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/posts\/227","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/comments?post=227"}],"version-history":[{"count":16,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/posts\/227\/revisions"}],"predecessor-version":[{"id":474,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/posts\/227\/revisions\/474"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/media\/229"}],"wp:attachment":[{"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/media?parent=227"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/categories?post=227"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.tiferking.cn\/index.php\/wp-json\/wp\/v2\/tags?post=227"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}